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author | Nate Begeman <natebegeman@mac.com> | 2007-01-29 22:58:52 +0000 |
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committer | Nate Begeman <natebegeman@mac.com> | 2007-01-29 22:58:52 +0000 |
commit | eda5997cc8e2ddaea20bc5cbb211622294320af7 (patch) | |
tree | 3c2896c81c262ed0f94ed51c8fefaf5c6423a0db /llvm/lib/Target/X86/X86ISelLowering.cpp | |
parent | e3b09fbbb04af77f8d9cde3e258fd3e34b83fe6e (diff) | |
download | bcm5719-llvm-eda5997cc8e2ddaea20bc5cbb211622294320af7.tar.gz bcm5719-llvm-eda5997cc8e2ddaea20bc5cbb211622294320af7.zip |
Finish off bug 680, allowing targets to custom lower frame and return
address nodes.
llvm-svn: 33636
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 41 |
1 files changed, 22 insertions, 19 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 69ca2c190f8..71cac03150a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -1940,25 +1940,6 @@ SDOperand X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) { -std::pair<SDOperand, SDOperand> X86TargetLowering:: -LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth, - SelectionDAG &DAG) { - SDOperand Result; - if (Depth) // Depths > 0 not supported yet! - Result = DAG.getConstant(0, getPointerTy()); - else { - SDOperand RetAddrFI = getReturnAddressFrameIndex(DAG); - if (!isFrameAddress) - // Just load the return address - Result = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), RetAddrFI, - NULL, 0); - else - Result = DAG.getNode(ISD::SUB, getPointerTy(), RetAddrFI, - DAG.getConstant(4, getPointerTy())); - } - return std::make_pair(Result, Chain); -} - /// translateX86CC - do a one to one translation of a ISD::CondCode to the X86 /// specific condition code. It returns a false if it cannot do a direct /// translation. X86CC is the translated CondCode. LHS/RHS are modified as @@ -4621,6 +4602,26 @@ X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDOperand Op, SelectionDAG &DAG) { } } +SDOperand X86TargetLowering::LowerRETURNADDR(SDOperand Op, SelectionDAG &DAG) { + // Depths > 0 not supported yet! + if (cast<ConstantSDNode>(Op.getOperand(0))->getValue() > 0) + return SDOperand(); + + // Just load the return address + SDOperand RetAddrFI = getReturnAddressFrameIndex(DAG); + return DAG.getLoad(getPointerTy(), DAG.getEntryNode(), RetAddrFI, NULL, 0); +} + +SDOperand X86TargetLowering::LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG) { + // Depths > 0 not supported yet! + if (cast<ConstantSDNode>(Op.getOperand(0))->getValue() > 0) + return SDOperand(); + + SDOperand RetAddrFI = getReturnAddressFrameIndex(DAG); + return DAG.getNode(ISD::SUB, getPointerTy(), RetAddrFI, + DAG.getConstant(4, getPointerTy())); +} + /// LowerOperation - Provide custom lowering hooks for some operations. /// SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { @@ -4654,6 +4655,8 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { case ISD::READCYCLECOUNTER: return LowerREADCYCLCECOUNTER(Op, DAG); case ISD::VASTART: return LowerVASTART(Op, DAG); case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); + case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG); + case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); } } |