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author | Quentin Colombet <qcolombet@apple.com> | 2014-04-26 01:11:26 +0000 |
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committer | Quentin Colombet <qcolombet@apple.com> | 2014-04-26 01:11:26 +0000 |
commit | ea18933d9783cbd759bb6454401d810beabb7376 (patch) | |
tree | dfcec46f2a6a703fe11164271ed8e8eb30d37a20 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
parent | 8f92d6db22b8f4ccfedf4349a8d18ab4f93dc8f8 (diff) | |
download | bcm5719-llvm-ea18933d9783cbd759bb6454401d810beabb7376.tar.gz bcm5719-llvm-ea18933d9783cbd759bb6454401d810beabb7376.zip |
[X86] Implement TargetLowering::getScalingFactorCost hook.
Scaling factors are not free on X86 because every "complex" addressing mode
breaks the related instruction into 2 allocations instead of 1.
<rdar://problem/16730541>
llvm-svn: 207301
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index ddf1d2d73c8..7d195fcdae9 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -20851,3 +20851,16 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, return Res; } + +int X86TargetLowering::getScalingFactorCost(const AddrMode &AM, + Type *Ty) const { + // Scaling factors are not free at all. + // An indexed folded instruction, i.e., inst (reg1, reg2, scale), + // will take 2 allocations instead of 1 for plain addressing mode, + // i.e. inst (reg1). + if (isLegalAddressingMode(AM, Ty)) + // Scale represents reg2 * scale, thus account for 1 + // as soon as we use a second register. + return AM.Scale != 0; + return -1; +} |