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| author | Simon Tatham <simon.tatham@arm.com> | 2019-06-25 16:49:32 +0000 |
|---|---|---|
| committer | Simon Tatham <simon.tatham@arm.com> | 2019-06-25 16:49:32 +0000 |
| commit | e8de8ba6a637c60d53db2433c0962c3fdbbdbf5c (patch) | |
| tree | b9aa1a7a9ea0881dee88867e12d7271baa5f7f19 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | 88139c143c5f419aa0ed6ba8bb8e70263ffb37cb (diff) | |
| download | bcm5719-llvm-e8de8ba6a637c60d53db2433c0962c3fdbbdbf5c.tar.gz bcm5719-llvm-e8de8ba6a637c60d53db2433c0962c3fdbbdbf5c.zip | |
[ARM] Support inline assembler constraints for MVE.
"To" selects an odd-numbered GPR, and "Te" an even one. There are some
8.1-M instructions that have one too few bits in their register fields
and require registers of particular parity, without necessarily using
a consecutive even/odd pair.
Also, the constraint letter "t" should select an MVE q-register, when
MVE is present. This didn't need any source changes, but some extra
tests have been added.
Reviewers: dmgreen, samparker, SjoerdMeijer
Subscribers: javed.absar, eraman, kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D60709
llvm-svn: 364331
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
0 files changed, 0 insertions, 0 deletions
