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| author | Michael Liao <michael.liao@intel.com> | 2012-11-12 06:49:17 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2012-11-12 06:49:17 +0000 |
| commit | d39c0fb19f26f9e6047bb68952aad1a413103497 (patch) | |
| tree | f649a79ae78f9a2ed9cd11e3b5ebf604b19d5700 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | 887b485dbe3dec6fb0387cf80c0e79f02bc7201d (diff) | |
| download | bcm5719-llvm-d39c0fb19f26f9e6047bb68952aad1a413103497.tar.gz bcm5719-llvm-d39c0fb19f26f9e6047bb68952aad1a413103497.zip | |
Fix PR14314
- Fix operand order for atomic sub, where the minuend is the value
loaded from memory and the subtrahend is the parameter specified.
llvm-svn: 167718
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 1f729e3133c..b35fb514bf9 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -12729,8 +12729,8 @@ X86TargetLowering::EmitAtomicLoadArith6432(MachineInstr *MI, case X86::ATOMSUB6432: { unsigned HiOpc; unsigned LoOpc = getNonAtomic6432Opcode(Opc, HiOpc); - BuildMI(mainMBB, DL, TII->get(LoOpc), t1L).addReg(SrcLoReg).addReg(LoReg); - BuildMI(mainMBB, DL, TII->get(HiOpc), t1H).addReg(SrcHiReg).addReg(HiReg); + BuildMI(mainMBB, DL, TII->get(LoOpc), t1L).addReg(LoReg).addReg(SrcLoReg); + BuildMI(mainMBB, DL, TII->get(HiOpc), t1H).addReg(HiReg).addReg(SrcHiReg); break; } case X86::ATOMNAND6432: { |
