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authorDan Gohman <gohman@apple.com>2010-01-15 22:18:15 +0000
committerDan Gohman <gohman@apple.com>2010-01-15 22:18:15 +0000
commitd2968c4c12125286d33f6eb1ab4fb24257ddad6f (patch)
tree63bbfb50d9028ca4af1212029496f717d2afe269 /llvm/lib/Target/X86/X86ISelLowering.cpp
parent0633820599a39b0a138da2ec7c31db0429cc1cea (diff)
downloadbcm5719-llvm-d2968c4c12125286d33f6eb1ab4fb24257ddad6f.tar.gz
bcm5719-llvm-d2968c4c12125286d33f6eb1ab4fb24257ddad6f.zip
Fix a typo that Anton noticed.
llvm-svn: 93563
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 228ec9f2d63..e3bd694ca1c 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -7579,7 +7579,7 @@ bool X86TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
bool X86TargetLowering::isZExtFree(const Type *Ty1, const Type *Ty2) const {
// x86-64 implicitly zero-extends 32-bit results in 64-bit registers.
- return Ty1->isInteger(64) && Ty2->isInteger(64) && Subtarget->is64Bit();
+ return Ty1->isInteger(32) && Ty2->isInteger(64) && Subtarget->is64Bit();
}
bool X86TargetLowering::isZExtFree(EVT VT1, EVT VT2) const {
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