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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-31 17:38:10 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-31 17:38:10 +0000 |
| commit | d04a2d2d5e3183476b0e5d2fe3ea824de2f76917 (patch) | |
| tree | f6f4e39600d2eb551910d2b12e42b16c94213813 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | d03bf06883a3384b574a0f467447c150b8057fa3 (diff) | |
| download | bcm5719-llvm-d04a2d2d5e3183476b0e5d2fe3ea824de2f76917.tar.gz bcm5719-llvm-d04a2d2d5e3183476b0e5d2fe3ea824de2f76917.zip | |
[X86][AVX] insert_subvector(bitcast(v), bitcast(s), c1) -> bitcast(insert_subvector(v,s,c2))
Similar to what we already do in DAGCombiner, but this version also handles bitcasts from types with different scalar sizes, which x86 is better at handling.
Differential Revision: https://reviews.llvm.org/D57514
llvm-svn: 352773
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 9bc3d482074..da479eb692c 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -41573,6 +41573,42 @@ static SDValue combineInsertSubvector(SDNode *N, SelectionDAG &DAG, } } + // Push subvector bitcasts to the output, adjusting the index as we go. + // insert_subvector(bitcast(v), bitcast(s), c1) -> + // bitcast(insert_subvector(v,s,c2)) + // TODO: Move this to generic - which only supports same scalar sizes. + if ((Vec.isUndef() || Vec.getOpcode() == ISD::BITCAST) && + SubVec.getOpcode() == ISD::BITCAST) { + SDValue VecSrc = peekThroughBitcasts(Vec); + SDValue SubVecSrc = peekThroughBitcasts(SubVec); + MVT VecSrcSVT = VecSrc.getSimpleValueType().getScalarType(); + MVT SubVecSrcSVT = SubVecSrc.getSimpleValueType().getScalarType(); + if (Vec.isUndef() || VecSrcSVT == SubVecSrcSVT) { + MVT NewOpVT; + SDValue NewIdx; + unsigned NumElts = OpVT.getVectorNumElements(); + unsigned EltSizeInBits = OpVT.getScalarSizeInBits(); + if ((EltSizeInBits % SubVecSrcSVT.getSizeInBits()) == 0) { + unsigned Scale = EltSizeInBits / SubVecSrcSVT.getSizeInBits(); + NewOpVT = MVT::getVectorVT(SubVecSrcSVT, NumElts * Scale); + NewIdx = DAG.getIntPtrConstant(IdxVal * Scale, dl); + } else if ((SubVecSrcSVT.getSizeInBits() % EltSizeInBits) == 0) { + unsigned Scale = SubVecSrcSVT.getSizeInBits() / EltSizeInBits; + if ((IdxVal % Scale) == 0) { + NewOpVT = MVT::getVectorVT(SubVecSrcSVT, NumElts / Scale); + NewIdx = DAG.getIntPtrConstant(IdxVal / Scale, dl); + } + } + if (NewIdx && DAG.getTargetLoweringInfo().isOperationLegal( + ISD::INSERT_SUBVECTOR, NewOpVT)) { + SDValue Res = DAG.getBitcast(NewOpVT, VecSrc); + Res = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, NewOpVT, Res, SubVecSrc, + NewIdx); + return DAG.getBitcast(OpVT, Res); + } + } + } + // Fold two 16-byte or 32-byte subvector loads into one 32-byte or 64-byte // load: // (insert_subvector (insert_subvector undef, (load16 addr), 0), |

