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authorRafael Espindola <rafael.espindola@gmail.com>2010-11-28 21:16:39 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2010-11-28 21:16:39 +0000
commitc4774795ce503a9fce447f74c43a3bece42cd29b (patch)
treedd8d0f768ea2b82e36a909329c9450f0c708aaf1 /llvm/lib/Target/X86/X86ISelLowering.cpp
parent111a31553fe95e74e17fb52debb285c8d9cc05a4 (diff)
downloadbcm5719-llvm-c4774795ce503a9fce447f74c43a3bece42cd29b.tar.gz
bcm5719-llvm-c4774795ce503a9fce447f74c43a3bece42cd29b.zip
Move lowering of TLS_addr32 and TLS_addr64 to X86MCInstLower.
llvm-svn: 120263
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp41
1 files changed, 0 insertions, 41 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 91768d4b9e0..6793b70dd57 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -9923,44 +9923,6 @@ X86TargetLowering::EmitLoweredTLSCall(MachineInstr *MI,
}
MachineBasicBlock *
-X86TargetLowering::emitLoweredTLSAddr(MachineInstr *MI,
- MachineBasicBlock *BB) const {
- const X86InstrInfo *TII
- = static_cast<const X86InstrInfo*>(getTargetMachine().getInstrInfo());
- DebugLoc DL = MI->getDebugLoc();
- if (Subtarget->is64Bit()) {
- BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX));
- MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(X86::LEA64r),
- X86::RDI);
- X86AddressMode Addr;
- Addr.GV = MI->getOperand(3).getGlobal();
- Addr.GVOpFlags = MI->getOperand(3).getTargetFlags();
- Addr.Base.Reg = X86::RIP;
- addFullAddress(MIB, Addr);
- BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX));
- BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX));
- BuildMI(*BB, MI, DL, TII->get(X86::REX64_PREFIX));
- BuildMI(*BB, MI, DL, TII->get(X86::CALL64pcrel32))
- .addExternalSymbol("__tls_get_addr", X86II::MO_PLT)
- .addReg(X86::RDI, RegState::Implicit);
- } else {
- MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(X86::LEA32r),
- X86::EAX);
- X86AddressMode Addr;
- Addr.GV = MI->getOperand(3).getGlobal();
- Addr.GVOpFlags = MI->getOperand(3).getTargetFlags();
- Addr.IndexReg = X86::EBX;
- addFullAddress(MIB, Addr);
- BuildMI(*BB, MI, DL, TII->get(X86::CALLpcrel32))
- .addExternalSymbol("___tls_get_addr", X86II::MO_PLT)
- .addReg(X86::EAX, RegState::Implicit);
- }
-
- MI->eraseFromParent(); // The pseudo instruction is gone now.
- return BB;
-}
-
-MachineBasicBlock *
X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
MachineBasicBlock *BB) const {
switch (MI->getOpcode()) {
@@ -9970,9 +9932,6 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
case X86::TLSCall_32:
case X86::TLSCall_64:
return EmitLoweredTLSCall(MI, BB);
- case X86::TLS_addr32:
- case X86::TLS_addr64:
- return emitLoweredTLSAddr(MI, BB);
case X86::CMOV_GR8:
case X86::CMOV_FR32:
case X86::CMOV_FR64:
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