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| author | Devang Patel <dpatel@apple.com> | 2007-03-17 00:13:28 +0000 |
|---|---|---|
| committer | Devang Patel <dpatel@apple.com> | 2007-03-17 00:13:28 +0000 |
| commit | b38c2ec89c3191f8127d6484be303b42fce28507 (patch) | |
| tree | 3ee834812ebbe96f8b8ef53981ee567db04184d8 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | 25d4052af6730548088280d1b320b6c4113fc851 (diff) | |
| download | bcm5719-llvm-b38c2ec89c3191f8127d6484be303b42fce28507.tar.gz bcm5719-llvm-b38c2ec89c3191f8127d6484be303b42fce28507.zip | |
Support 'I' inline asm constraint.
llvm-svn: 35129
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 9874c253f59..c8a2e2eaef5 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4523,6 +4523,17 @@ SDOperand X86TargetLowering:: isOperandValidForConstraint(SDOperand Op, char Constraint, SelectionDAG &DAG) { switch (Constraint) { default: break; + case 'I': + if (isa<ConstantSDNode>(Op)) { + unsigned Value = cast<ConstantSDNode>(Op)->getValue(); + if (Value >= 0 && Value <= 31) + return Op; + else + return SDOperand(0,0); + } else { + return SDOperand(0,0); + } + break; case 'i': // Literal immediates are always ok. if (isa<ConstantSDNode>(Op)) return Op; |
