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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-02 18:56:06 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-02 18:56:06 +0000 |
| commit | b3067dc374c19fc98dd6891bafbf54f3ed56dc72 (patch) | |
| tree | 85743ed3294069596f89075259e59e28b494d1d5 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | 3dd966b0ce7aa18ca46418a9e54f0a9677fedfb5 (diff) | |
| download | bcm5719-llvm-b3067dc374c19fc98dd6891bafbf54f3ed56dc72.tar.gz bcm5719-llvm-b3067dc374c19fc98dd6891bafbf54f3ed56dc72.zip | |
[X86][MMX] Fixed i32 extraction on 32-bit targets
MMX extraction often ends up as extract_i32(bitcast_v2i32(extract_i64(bitcast_v1i64(x86mmx v), 0)), 0) which fails to simplify on 32-bit targets as i64 isn't legal
llvm-svn: 296782
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e3a880957ed..65d5ad3f242 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -29027,6 +29027,16 @@ static SDValue combineExtractVectorElt(SDNode *N, SelectionDAG &DAG, EVT VT = N->getValueType(0); SDLoc dl(InputVector); + // Detect mmx extraction of all bits as a i64. It works better as a bitcast. + if (InputVector.getOpcode() == ISD::BITCAST && InputVector.hasOneUse() && + VT == MVT::i64 && SrcVT == MVT::v1i64 && isNullConstant(EltIdx)) { + SDValue MMXSrc = InputVector.getOperand(0); + + // The bitcast source is a direct mmx result. + if (MMXSrc.getValueType() == MVT::x86mmx) + return DAG.getBitcast(VT, InputVector); + } + // Detect mmx to i32 conversion through a v2i32 elt extract. if (InputVector.getOpcode() == ISD::BITCAST && InputVector.hasOneUse() && VT == MVT::i32 && SrcVT == MVT::v2i32 && isNullConstant(EltIdx)) { |
