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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-07-04 18:11:02 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-07-04 18:11:02 +0000 |
| commit | ac3e7f3f57f143514d13263889ca655185ea2e3c (patch) | |
| tree | ac7f4f02f5024e801c4e9a4cbe91bff4cdac196b /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | f809c5f11ccd5bb245d1dd1cb3ea9e87c9bd1f69 (diff) | |
| download | bcm5719-llvm-ac3e7f3f57f143514d13263889ca655185ea2e3c.tar.gz bcm5719-llvm-ac3e7f3f57f143514d13263889ca655185ea2e3c.zip | |
[X86][SSE4A] Add support for combining from non-v16i8 EXTRQI/INSERTQI shuffles
With the improved shuffle decoding we can now combine EXTRQI/INSERTQI shuffles from non-v16i8 vector types
llvm-svn: 307099
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 5fefaf4b644..12adb70f4af 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -5557,7 +5557,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero, IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1); break; case X86ISD::EXTRQI: - if (VT == MVT::v16i8 && isa<ConstantSDNode>(N->getOperand(1)) && + if (isa<ConstantSDNode>(N->getOperand(1)) && isa<ConstantSDNode>(N->getOperand(2))) { int BitLen = N->getConstantOperandVal(1); int BitIdx = N->getConstantOperandVal(2); @@ -5566,8 +5566,8 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero, } break; case X86ISD::INSERTQI: - if (VT == MVT::v16i8 && isa<ConstantSDNode>(N->getOperand(2)) && - isa<ConstantSDNode>(N->getOperand(3))) { + if (isa<ConstantSDNode>(N->getOperand(2)) && + isa<ConstantSDNode>(N->getOperand(3))) { int BitLen = N->getConstantOperandVal(2); int BitIdx = N->getConstantOperandVal(3); DecodeINSERTQIMask(VT, BitLen, BitIdx, Mask); |
