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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-12 10:28:12 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-12 10:28:12 +0000 |
| commit | a21e2bd682a41487fc2ce9284818fcaad8e20069 (patch) | |
| tree | 9d63ed5054ffb8bdfd940540a18bffdc74d1e19a /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | ca0de0363b00756e39fa3cebdba7d9e34b8912bd (diff) | |
| download | bcm5719-llvm-a21e2bd682a41487fc2ce9284818fcaad8e20069.tar.gz bcm5719-llvm-a21e2bd682a41487fc2ce9284818fcaad8e20069.zip | |
[X86] Improve vXi64 ISD::ABS codegen with SSE41+
Make use of vblendvpd to select on the signbit
Differential Revision: https://reviews.llvm.org/D56544
llvm-svn: 350999
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 4989c61f68f..06802aac81e 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -23602,6 +23602,15 @@ static SDValue LowerABS(SDValue Op, const X86Subtarget &Subtarget, return DAG.getNode(X86ISD::CMOV, DL, VT, Ops); } + // ABS(vXi64 X) --> VPBLENDVPD(X, 0-X, X). + if ((VT == MVT::v2i64 || VT == MVT::v4i64) && Subtarget.hasSSE41()) { + SDLoc DL(Op); + SDValue Src = Op.getOperand(0); + SDValue Sub = + DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), Src); + return DAG.getNode(X86ISD::SHRUNKBLEND, DL, VT, Src, Sub, Src); + } + if (VT.is256BitVector() && !Subtarget.hasInt256()) { assert(VT.isInteger() && "Only handle AVX 256-bit vector integer operation"); |
