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| author | Craig Topper <craig.topper@intel.com> | 2018-01-08 06:53:52 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-08 06:53:52 +0000 |
| commit | a2018e799a716aaaef9ced091e79994255e0b161 (patch) | |
| tree | 1af933685ac251e58cbb4ff3e0500212c922f86f /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | fd3e4b0ea12dab82c6584106e7efb4872ca406f9 (diff) | |
| download | bcm5719-llvm-a2018e799a716aaaef9ced091e79994255e0b161.tar.gz bcm5719-llvm-a2018e799a716aaaef9ced091e79994255e0b161.zip | |
[X86] Add patterns to allow 512-bit BWI compare instructions to be used for 128/256-bit compares when VLX is not available.
llvm-svn: 321984
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 3c19960860d..3f10c978047 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -17840,12 +17840,7 @@ static SDValue LowerVSETCC(SDValue Op, const X86Subtarget &Subtarget, // In AVX-512 architecture setcc returns mask with i1 elements, // But there is no compare instruction for i8 and i16 elements in KNL. // In this case use SSE compare - bool UseAVX512Inst = - (OpVT.is512BitVector() || - OpVT.getScalarSizeInBits() >= 32 || - (Subtarget.hasBWI() && Subtarget.hasVLX())); - - if (UseAVX512Inst) + if (OpVT.getScalarSizeInBits() >= 32 || Subtarget.hasBWI()) return LowerIntVSETCC_AVX512(Op, DAG); return DAG.getNode(ISD::TRUNCATE, dl, VT, |
