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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-07-04 16:53:12 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-07-04 16:53:12 +0000 |
| commit | 9f0a0bd20b02278bf15fe5ffda6c6b62a996c71c (patch) | |
| tree | 83184383490b3ea185b653f9301fddccce9a811c /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | 79f8933f23f88e137014be175fc8c6539764b923 (diff) | |
| download | bcm5719-llvm-9f0a0bd20b02278bf15fe5ffda6c6b62a996c71c.tar.gz bcm5719-llvm-9f0a0bd20b02278bf15fe5ffda6c6b62a996c71c.zip | |
[X86][SSE4A] Generalized EXTRQI/INSERTQI shuffle decodes
The existing decodes only worked for v16i8 vectors, this adds support for any 128-bit vector
llvm-svn: 307095
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 1f4bc356943..5fefaf4b644 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -5561,7 +5561,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero, isa<ConstantSDNode>(N->getOperand(2))) { int BitLen = N->getConstantOperandVal(1); int BitIdx = N->getConstantOperandVal(2); - DecodeEXTRQIMask(BitLen, BitIdx, Mask); + DecodeEXTRQIMask(VT, BitLen, BitIdx, Mask); IsUnary = true; } break; @@ -5570,7 +5570,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero, isa<ConstantSDNode>(N->getOperand(3))) { int BitLen = N->getConstantOperandVal(2); int BitIdx = N->getConstantOperandVal(3); - DecodeINSERTQIMask(BitLen, BitIdx, Mask); + DecodeINSERTQIMask(VT, BitLen, BitIdx, Mask); IsUnary = IsFakeUnary = N->getOperand(0) == N->getOperand(1); } break; |
