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| author | Craig Topper <craig.topper@gmail.com> | 2017-03-31 17:24:29 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2017-03-31 17:24:29 +0000 |
| commit | 9601168670c12bf45d7037f91d34a187363f15dd (patch) | |
| tree | 364dc3af884f2a774b25068f03c1aadc635d375b /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | f771f79b2fbd1e1dc47b7308f0db2c2f8b4bd56f (diff) | |
| download | bcm5719-llvm-9601168670c12bf45d7037f91d34a187363f15dd.tar.gz bcm5719-llvm-9601168670c12bf45d7037f91d34a187363f15dd.zip | |
[AVX-512] Update lowering for gather/scatter prefetch intrinsics to match the immediate encodings the frontend uses based on the _MM_HINT_T0/T1 constant values in clang's headers.
Our _MM_HINT_T0/T1 constant values are 3/2 which matches gcc, but not icc or Intel documentation. Interestingly gcc had this same bug on their implementation of the gather/scatter builtins at one point too.
Fixes PR32411.
llvm-svn: 299234
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index aa741336f92..11b3c2e32f6 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -20433,9 +20433,9 @@ static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget &Subtarget, case PREFETCH: { SDValue Hint = Op.getOperand(6); unsigned HintVal = cast<ConstantSDNode>(Hint)->getZExtValue(); - assert((HintVal == 1 || HintVal == 2) && - "Wrong prefetch hint in intrinsic: should be 1 or 2"); - unsigned Opcode = (HintVal != 1 ? IntrData->Opc1 : IntrData->Opc0); + assert((HintVal == 2 || HintVal == 3) && + "Wrong prefetch hint in intrinsic: should be 2 or 3"); + unsigned Opcode = (HintVal == 2 ? IntrData->Opc1 : IntrData->Opc0); SDValue Chain = Op.getOperand(0); SDValue Mask = Op.getOperand(2); SDValue Index = Op.getOperand(3); |
