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| author | Benjamin Kramer <benny.kra@googlemail.com> | 2017-01-31 14:13:53 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2017-01-31 14:13:53 +0000 |
| commit | 94a833962cfe7b1baefc4f683fcbce2a02e78e34 (patch) | |
| tree | a2ac9cff97d5486ff0a2957d2c5e33a50acec4ae /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | da7ceb5e1bbf84580efd5ca33484a87a38cac0c7 (diff) | |
| download | bcm5719-llvm-94a833962cfe7b1baefc4f683fcbce2a02e78e34.tar.gz bcm5719-llvm-94a833962cfe7b1baefc4f683fcbce2a02e78e34.zip | |
[X86] Silence unused variable warning in Release builds.
llvm-svn: 293631
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index f1d6c704017..8bbe21c9b3a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -30610,10 +30610,11 @@ static SDValue combineVectorShift(SDNode *N, SelectionDAG &DAG, static SDValue combineVectorInsert(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget &Subtarget) { - unsigned Opcode = N->getOpcode(); - assert(((X86ISD::PINSRB == Opcode && N->getValueType(0) ==MVT::v16i8) || - (X86ISD::PINSRW == Opcode && N->getValueType(0) ==MVT::v8i16)) && - "Unexpected vector insertion"); + assert( + ((N->getOpcode() == X86ISD::PINSRB && N->getValueType(0) == MVT::v16i8) || + (N->getOpcode() == X86ISD::PINSRW && + N->getValueType(0) == MVT::v8i16)) && + "Unexpected vector insertion"); // Attempt to combine PINSRB/PINSRW patterns to a shuffle. SDValue Op(N, 0); |
