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authorEvan Cheng <evan.cheng@apple.com>2010-03-01 22:00:11 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-03-01 22:00:11 +0000
commit87d50aa18afc331d8a699cb585cca0bada105653 (patch)
treea9832724ecf8d8e16dee3e127ca06c0d7c491e98 /llvm/lib/Target/X86/X86ISelLowering.cpp
parent33758dcad200177cc3d7184416a42b40648eaa8a (diff)
downloadbcm5719-llvm-87d50aa18afc331d8a699cb585cca0bada105653.tar.gz
bcm5719-llvm-87d50aa18afc331d8a699cb585cca0bada105653.zip
Remove the optimize for code size limitation on r67917. Optimize 64-bit imul by constants into leas + shl regardless if optimizing for code size. The size saving from using imulq isn't worth it. Also, the lea and shl instructions may expose further optimization.
llvm-svn: 97507
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index b0a1bff04c1..8cfc1b28415 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -9233,10 +9233,6 @@ static SDValue PerformANDCombine(SDNode *N, SelectionDAG &DAG,
/// LEA + SHL, LEA + LEA.
static SDValue PerformMulCombine(SDNode *N, SelectionDAG &DAG,
TargetLowering::DAGCombinerInfo &DCI) {
- if (DAG.getMachineFunction().
- getFunction()->hasFnAttr(Attribute::OptimizeForSize))
- return SDValue();
-
if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer())
return SDValue();
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