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| author | Davide Italiano <davide@freebsd.org> | 2017-04-11 19:11:20 +0000 |
|---|---|---|
| committer | Davide Italiano <davide@freebsd.org> | 2017-04-11 19:11:20 +0000 |
| commit | 8455f7d623997063e7826ae607491fc839a50a72 (patch) | |
| tree | b4c6b65743164553c25af5b465379c97000acaa8 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | 8e26936bfd722a74e5b1fcc8506c0ef9f93b2f4f (diff) | |
| download | bcm5719-llvm-8455f7d623997063e7826ae607491fc839a50a72.tar.gz bcm5719-llvm-8455f7d623997063e7826ae607491fc839a50a72.zip | |
[X86] Create the correct ADC/SBB SDNode when lowering add.
Differential Revision: https://reviews.llvm.org/D31911
llvm-svn: 299973
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a830dce109b..5c8a95963c3 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -34606,15 +34606,17 @@ static SDValue combineAddOrSubToADCOrSBB(SDNode *N, SelectionDAG &DAG) { SDValue NewCmp = DAG.getNode(X86ISD::CMP, DL, MVT::i32, Z, DAG.getConstant(1, DL, Z.getValueType())); + SDVTList VTs = DAG.getVTList(N->getValueType(0), MVT::i32); + // X - (Z != 0) --> sub X, (zext(setne Z, 0)) --> adc X, -1, (cmp Z, 1) // X + (Z != 0) --> add X, (zext(setne Z, 0)) --> sbb X, -1, (cmp Z, 1) if (CC == X86::COND_NE) - return DAG.getNode(IsSub ? X86ISD::ADC : X86ISD::SBB, DL, VT, X, + return DAG.getNode(IsSub ? X86ISD::ADC : X86ISD::SBB, DL, VTs, X, DAG.getConstant(-1ULL, DL, VT), NewCmp); // X - (Z == 0) --> sub X, (zext(sete Z, 0)) --> sbb X, 0, (cmp Z, 1) // X + (Z == 0) --> add X, (zext(sete Z, 0)) --> adc X, 0, (cmp Z, 1) - return DAG.getNode(IsSub ? X86ISD::SBB : X86ISD::ADC, DL, VT, X, + return DAG.getNode(IsSub ? X86ISD::SBB : X86ISD::ADC, DL, VTs, X, DAG.getConstant(0, DL, VT), NewCmp); } |
