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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-10 16:51:45 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-10 16:51:45 +0000 |
| commit | 8224241f757c57fcb6696264ca3ae66a9e82de9a (patch) | |
| tree | 41582c65bbe7c6acb058e7ffaab5ddb0566c0c33 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | 42227168220a642afe0e412595e5a7f6244f9b3f (diff) | |
| download | bcm5719-llvm-8224241f757c57fcb6696264ca3ae66a9e82de9a.tar.gz bcm5719-llvm-8224241f757c57fcb6696264ca3ae66a9e82de9a.zip | |
[X86][XOP] createVariablePermute - use VPPERM for v32i8 variable permutes
llvm-svn: 327213
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index b5649707cc5..f10c23504d5 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -7972,6 +7972,16 @@ SDValue createVariablePermute(MVT VT, SDValue SrcVec, SDValue IndicesVec, case MVT::v32i8: if (Subtarget.hasVLX() && Subtarget.hasVBMI()) Opcode = X86ISD::VPERMV; + else if (Subtarget.hasXOP()) { + SDValue LoSrc = extract128BitVector(SrcVec, 0, DAG, DL); + SDValue HiSrc = extract128BitVector(SrcVec, 16, DAG, DL); + SDValue LoIdx = extract128BitVector(IndicesVec, 0, DAG, DL); + SDValue HiIdx = extract128BitVector(IndicesVec, 16, DAG, DL); + return DAG.getNode( + ISD::CONCAT_VECTORS, DL, VT, + DAG.getNode(X86ISD::VPPERM, DL, MVT::v16i8, LoSrc, HiSrc, LoIdx), + DAG.getNode(X86ISD::VPPERM, DL, MVT::v16i8, LoSrc, HiSrc, HiIdx)); + } break; case MVT::v16i16: if (Subtarget.hasVLX() && Subtarget.hasBWI()) |
