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| author | Craig Topper <craig.topper@intel.com> | 2019-09-09 01:35:00 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-09-09 01:35:00 +0000 |
| commit | 72624b0e59d6174f03a19df01004665e85ecaa89 (patch) | |
| tree | 8a72c7f400c3b98a823fdc98346b17f00fdd2876 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | 861d3439493986f17e3b357565175c3ed8820d17 (diff) | |
| download | bcm5719-llvm-72624b0e59d6174f03a19df01004665e85ecaa89.tar.gz bcm5719-llvm-72624b0e59d6174f03a19df01004665e85ecaa89.zip | |
[X86] Use xorps to create fp128 +0.0 constants.
This matches what we do for f32/f64. gcc also does this for fp128.
llvm-svn: 371357
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 2fa368764a5..0a8219214f4 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -628,6 +628,8 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM, setOperationAction(ISD::FABS , MVT::f128, Custom); setOperationAction(ISD::FNEG , MVT::f128, Custom); setOperationAction(ISD::FCOPYSIGN, MVT::f128, Custom); + + addLegalFPImmediate(APFloat::getZero(APFloat::IEEEquad())); // xorps } addRegisterClass(MVT::f80, &X86::RFP80RegClass); |
