diff options
author | Evan Cheng <evan.cheng@apple.com> | 2006-12-05 04:01:03 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2006-12-05 04:01:03 +0000 |
commit | 62cdc3f011003f942430d75d3f46680856880cd6 (patch) | |
tree | c093bd6a341243691d401548f2700bb9dc6cd486 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
parent | 830f224bf5c9356ccdea2ac66be0efb12e7d2740 (diff) | |
download | bcm5719-llvm-62cdc3f011003f942430d75d3f46680856880cd6.tar.gz bcm5719-llvm-62cdc3f011003f942430d75d3f46680856880cd6.zip |
- Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit
immediate in small code model. The JIT cannot ensure GV's are placed in the
lower 4G.
- Some preliminary support for large code model.
llvm-svn: 32215
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 39 |
1 files changed, 5 insertions, 34 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 9358c8b3d4a..a9d217860b3 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -3832,14 +3832,7 @@ X86TargetLowering::LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { SDOperand Result = DAG.getTargetConstantPool(CP->getConstVal(), getPointerTy(), CP->getAlignment()); - // Use X86ISD::WrapperRIP if we are in X86-64 small / medium PIC mode. - TargetMachine &tm = getTargetMachine(); - unsigned WrapperOpcode = (Subtarget->is64Bit() && - (tm.getCodeModel() == CodeModel::Small || - tm.getCodeModel() == CodeModel::Medium) && - tm.getRelocationModel() == Reloc::PIC_) - ? X86ISD::WrapperRIP : X86ISD::Wrapper; - Result = DAG.getNode(WrapperOpcode, getPointerTy(), Result); + Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); if (Subtarget->isTargetDarwin()) { // With PIC, the address is actually $g + Offset. if (!Subtarget->is64Bit() && @@ -3855,14 +3848,7 @@ SDOperand X86TargetLowering::LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG) { GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); SDOperand Result = DAG.getTargetGlobalAddress(GV, getPointerTy()); - // Use X86ISD::WrapperRIP if we are in X86-64 small / medium PIC mode. - TargetMachine &tm = getTargetMachine(); - unsigned WrapperOpcode = (Subtarget->is64Bit() && - (tm.getCodeModel() == CodeModel::Small || - tm.getCodeModel() == CodeModel::Medium) && - tm.getRelocationModel() == Reloc::PIC_) - ? X86ISD::WrapperRIP : X86ISD::Wrapper; - Result = DAG.getNode(WrapperOpcode, getPointerTy(), Result); + Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); if (Subtarget->isTargetDarwin()) { // With PIC, the address is actually $g + Offset. if (!Subtarget->is64Bit() && @@ -3889,14 +3875,7 @@ SDOperand X86TargetLowering::LowerExternalSymbol(SDOperand Op, SelectionDAG &DAG) { const char *Sym = cast<ExternalSymbolSDNode>(Op)->getSymbol(); SDOperand Result = DAG.getTargetExternalSymbol(Sym, getPointerTy()); - // Use X86ISD::WrapperRIP if we are in X86-64 small / medium PIC mode. - TargetMachine &tm = getTargetMachine(); - unsigned WrapperOpcode = (Subtarget->is64Bit() && - (tm.getCodeModel() == CodeModel::Small || - tm.getCodeModel() == CodeModel::Medium) && - tm.getRelocationModel() == Reloc::PIC_) - ? X86ISD::WrapperRIP : X86ISD::Wrapper; - Result = DAG.getNode(WrapperOpcode, getPointerTy(), Result); + Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); if (Subtarget->isTargetDarwin()) { // With PIC, the address is actually $g + Offset. if (!Subtarget->is64Bit() && @@ -4264,14 +4243,7 @@ SDOperand X86TargetLowering::LowerBRCOND(SDOperand Op, SelectionDAG &DAG) { SDOperand X86TargetLowering::LowerJumpTable(SDOperand Op, SelectionDAG &DAG) { JumpTableSDNode *JT = cast<JumpTableSDNode>(Op); SDOperand Result = DAG.getTargetJumpTable(JT->getIndex(), getPointerTy()); - // Use X86ISD::WrapperRIP if we are in X86-64 small / medium PIC mode. - TargetMachine &tm = getTargetMachine(); - unsigned WrapperOpcode = (Subtarget->is64Bit() && - (tm.getCodeModel() == CodeModel::Small || - tm.getCodeModel() == CodeModel::Medium) && - tm.getRelocationModel() == Reloc::PIC_) - ? X86ISD::WrapperRIP : X86ISD::Wrapper; - Result = DAG.getNode(WrapperOpcode, getPointerTy(), Result); + Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); if (Subtarget->isTargetDarwin()) { // With PIC, the address is actually $g + Offset. if (!Subtarget->is64Bit() && @@ -5005,7 +4977,6 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const { case X86ISD::LOAD_UA: return "X86ISD::LOAD_UA"; case X86ISD::GlobalBaseReg: return "X86ISD::GlobalBaseReg"; case X86ISD::Wrapper: return "X86ISD::Wrapper"; - case X86ISD::WrapperRIP: return "X86ISD::WrapperRIP"; case X86ISD::S2VEC: return "X86ISD::S2VEC"; case X86ISD::PEXTRW: return "X86ISD::PEXTRW"; case X86ISD::PINSRW: return "X86ISD::PINSRW"; @@ -5249,7 +5220,7 @@ static SDOperand getShuffleScalarElt(SDNode *N, unsigned i, SelectionDAG &DAG) { /// node is a GlobalAddress + an offset. static bool isGAPlusOffset(SDNode *N, GlobalValue* &GA, int64_t &Offset) { unsigned Opc = N->getOpcode(); - if (Opc == X86ISD::Wrapper || Opc == X86ISD::WrapperRIP) { + if (Opc == X86ISD::Wrapper) { if (dyn_cast<GlobalAddressSDNode>(N->getOperand(0))) { GA = cast<GlobalAddressSDNode>(N->getOperand(0))->getGlobal(); return true; |