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author | Bill Wendling <isanbard@gmail.com> | 2008-08-24 21:45:30 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2008-08-24 21:45:30 +0000 |
commit | 5b836c5f77126b34298a0e92d6ed1f4190e61745 (patch) | |
tree | 6d5f121e8552ee10be847cd43206cbbbac84d95e /llvm/lib/Target/X86/X86ISelLowering.cpp | |
parent | 25852069ed4ce542094fe263f19886f69a1bdf20 (diff) | |
download | bcm5719-llvm-5b836c5f77126b34298a0e92d6ed1f4190e61745.tar.gz bcm5719-llvm-5b836c5f77126b34298a0e92d6ed1f4190e61745.zip |
Temporarily reverting r55292. It's causing a bootstraping failure:
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc ... src/libiberty/make-temp-file.c -o make-temp-file.o
Assertion failed: (Node2Index[SU->NodeNum] > Node2Index[I->Dep->NodeNum] && "Wrong topological sorting"), function InitDAGTopologicalSorting, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 508.
../../../../llvm-gcc.src/libiberty/hashtab.c:955: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [hashtab.o] Error 1
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [multi-do] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libiberty] Error 2
make: *** [all] Error 2
llvm-svn: 55295
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 09a30db218a..5d8cb1cd291 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -1457,12 +1457,12 @@ EmitTailCallStoreRetAddr(SelectionDAG & DAG, MachineFunction &MF, SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { MachineFunction &MF = DAG.getMachineFunction(); - SDValue Chain = Op.getOperand(0); + SDValue Chain = Op.getOperand(0); unsigned CC = cast<ConstantSDNode>(Op.getOperand(1))->getValue(); bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; bool IsTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0 && CC == CallingConv::Fast && PerformTailCallOpt; - SDValue Callee = Op.getOperand(4); + SDValue Callee = Op.getOperand(4); bool Is64Bit = Subtarget->is64Bit(); bool IsStructRet = CallIsStructReturn(Op); @@ -1499,11 +1499,6 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { MF.getInfo<X86MachineFunctionInfo>()->setTCReturnAddrDelta(FPDiff); } - // If the address is a load, i.e. indirect function call, move callseq_start - // above the load. This makes it possible for the load to fold into the call. - if (Callee.Val == Chain.Val && ISD::isNormalLoad(Callee.Val) && - Chain.hasOneUse() && Callee.hasOneUse()) - Chain = Chain.getOperand(0); Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes)); SDValue RetAddrFrIdx; |