diff options
| author | Craig Topper <craig.topper@intel.com> | 2017-08-13 20:21:12 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-08-13 20:21:12 +0000 |
| commit | 5b59176abb92737af61bf67837535fd4c6f0f80f (patch) | |
| tree | baf67c55701afa08dc0dc0c7e01c456b01a26e53 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | c4edc0705c1e8439ec79d6c563fb9031758330f2 (diff) | |
| download | bcm5719-llvm-5b59176abb92737af61bf67837535fd4c6f0f80f.tar.gz bcm5719-llvm-5b59176abb92737af61bf67837535fd4c6f0f80f.zip | |
[X86] Fix typo from r310794. Index = 0 should have been Index == 0.
llvm-svn: 310801
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 04ee7121c7e..bed9ff58468 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4582,8 +4582,8 @@ bool X86TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, // Mask vectors support all subregister combinations and operations that // extract half of vector. if (ResVT.getVectorElementType() == MVT::i1) - return Index = 0 || ((ResVT.getSizeInBits() == SrcVT.getSizeInBits() * 2) && - (Index == ResVT.getVectorNumElements())); + return Index == 0 || ((ResVT.getSizeInBits() == SrcVT.getSizeInBits()*2) && + (Index == ResVT.getVectorNumElements())); return (Index % ResVT.getVectorNumElements()) == 0; } |
