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| author | Craig Topper <craig.topper@intel.com> | 2017-08-14 15:32:40 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-08-14 15:32:40 +0000 |
| commit | 411f29de69b25168b2a5dc294922db0b19aa7028 (patch) | |
| tree | 8c80cdfbc097779077040197c821c562d0d9bc71 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | c0471829b1e86c4bea12b7fd73e15c9c5b2f7a6b (diff) | |
| download | bcm5719-llvm-411f29de69b25168b2a5dc294922db0b19aa7028.tar.gz bcm5719-llvm-411f29de69b25168b2a5dc294922db0b19aa7028.zip | |
[X86] Fix a place that was mishandling X86ISD::UMUL.
According to the X86ISelLowering.h, UMUL results are low, high, and flags. But this place was treating result 1 or 2 as flags.
Differential Revision: https://reviews.llvm.org/D36654
llvm-svn: 310846
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index afe9ae3b6bd..16473fc5593 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -17604,7 +17604,7 @@ static bool isX86LogicalCmp(SDValue Op) { return true; if (Op.getResNo() == 1 && (Opc == X86ISD::ADD || Opc == X86ISD::SUB || Opc == X86ISD::ADC || - Opc == X86ISD::SBB || Opc == X86ISD::SMUL || Opc == X86ISD::UMUL || + Opc == X86ISD::SBB || Opc == X86ISD::SMUL || Opc == X86ISD::INC || Opc == X86ISD::DEC || Opc == X86ISD::OR || Opc == X86ISD::XOR || Opc == X86ISD::AND)) return true; |
