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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-10-13 14:45:44 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-10-13 14:45:44 +0000 |
| commit | 1c6d3203510bcae9680e8e721919341da063c915 (patch) | |
| tree | 9a4ee2934023b6087526843ce181c1845f35cfcc /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | a03379527af1c017d19bb0a232c928d8e675ec0b (diff) | |
| download | bcm5719-llvm-1c6d3203510bcae9680e8e721919341da063c915.tar.gz bcm5719-llvm-1c6d3203510bcae9680e8e721919341da063c915.zip | |
[X86][SSE] combineIncDecVector - use isConstantSplat
Use isConstantSplat instead of ISD::isConstantSplatVector to let us us peek through to illegal types (in this case for i686 targets to recognise i64 constants)
llvm-svn: 344452
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index d6699c6e678..18c5f60f2f2 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -39603,10 +39603,8 @@ static SDValue combineIncDecVector(SDNode *N, SelectionDAG &DAG) { if (!VT.is128BitVector() && !VT.is256BitVector() && !VT.is512BitVector()) return SDValue(); - SDNode *N1 = N->getOperand(1).getNode(); APInt SplatVal; - if (!ISD::isConstantSplatVector(N1, SplatVal) || - !SplatVal.isOneValue()) + if (!isConstantSplat(N->getOperand(1), SplatVal) || !SplatVal.isOneValue()) return SDValue(); SDValue AllOnesVec = getOnesVector(VT, DAG, SDLoc(N)); |
