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authorEvan Cheng <evan.cheng@apple.com>2008-10-14 21:26:46 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-10-14 21:26:46 +0000
commit07d53b1d33e0be27d5fba7f5bc749f3b7332418c (patch)
treeadc145207cc34b4f77d3599a7d8e3faefed55c28 /llvm/lib/Target/X86/X86ISelLowering.cpp
parentb7c01f5f4833db0ddfaa11e55f6e6276d499db08 (diff)
downloadbcm5719-llvm-07d53b1d33e0be27d5fba7f5bc749f3b7332418c.tar.gz
bcm5719-llvm-07d53b1d33e0be27d5fba7f5bc749f3b7332418c.zip
Rename LoadX to LoadExt.
llvm-svn: 57526
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 6d3d0b0554e..19b94dfe095 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -84,7 +84,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
if (Subtarget->is64Bit())
addRegisterClass(MVT::i64, X86::GR64RegisterClass);
- setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
// We don't accept any truncstore of integer registers.
setTruncStoreAction(MVT::i64, MVT::i32, Expand);
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