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authorSimon Pilgrim <llvm-dev@redking.me.uk>2017-02-03 17:59:58 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2017-02-03 17:59:58 +0000
commit034c1bd32c2d201ba333b5cda9c8f873276beee9 (patch)
tree3e2c7233e465d1666c25d92cd12ddcad00537d07 /llvm/lib/Target/X86/X86ISelLowering.cpp
parentec9bc8ccd49fa4f89931e47e83c88939acd86db5 (diff)
downloadbcm5719-llvm-034c1bd32c2d201ba333b5cda9c8f873276beee9.tar.gz
bcm5719-llvm-034c1bd32c2d201ba333b5cda9c8f873276beee9.zip
[X86][SSE] Add support for combining scalar_to_vector(extract_vector_elt) into a target shuffle.
Correctly flagging upper elements as undef. llvm-svn: 294020
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp14
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index a7a141050d9..f4b81063bcc 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -5729,6 +5729,20 @@ static bool getFauxShuffleMask(SDValue N, SmallVectorImpl<int> &Mask,
Ops.push_back(IsAndN ? N1 : N0);
return true;
}
+ case ISD::SCALAR_TO_VECTOR: {
+ // Match against a scalar_to_vector of an extract from a similar vector.
+ SDValue N0 = N.getOperand(0);
+ if (N0.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
+ N0.getOperand(0).getValueType() != VT ||
+ !isa<ConstantSDNode>(N0.getOperand(1)) ||
+ NumElts <= N0.getConstantOperandVal(1) ||
+ !N->isOnlyUserOf(N0.getNode()))
+ return false;
+ Ops.push_back(N0.getOperand(0));
+ Mask.push_back(N0.getConstantOperandVal(1));
+ Mask.append(NumElts - 1, SM_SentinelUndef);
+ return true;
+ }
case X86ISD::PINSRB:
case X86ISD::PINSRW: {
SDValue InVec = N.getOperand(0);
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