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| author | Craig Topper <craig.topper@intel.com> | 2019-03-25 06:53:45 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-03-25 06:53:45 +0000 |
| commit | 1cc01c3228485e4ed6be2b6d10b1061f6a58ae36 (patch) | |
| tree | 6d37e72c1297adb9d5208ae08201c6fe39c4f4e1 /llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | |
| parent | 3810e35d3fa7b9b9d18d7171d3dc9fcc5c151ac9 (diff) | |
| download | bcm5719-llvm-1cc01c3228485e4ed6be2b6d10b1061f6a58ae36.tar.gz bcm5719-llvm-1cc01c3228485e4ed6be2b6d10b1061f6a58ae36.zip | |
[X86] When selecting (x << C1) op C2 as (x op (C2>>C1)) << C1, use the operation VT for the target constant.
Normally when the nodes we use here(AND32ri8 for example) are selected their
immediates are just converted from ConstantSDNode to TargetConstantSDNode
without changing VT from the original operation VT. So we should still be
emitting them with the operation VT.
Theoretically this could expose more accurate opportunities for CSE.
llvm-svn: 356869
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelDAGToDAG.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp index bfa0df7db34..6290a8f4a8d 100644 --- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -3561,7 +3561,8 @@ void X86DAGToDAGISel::Select(SDNode *Node) { } // Emit the smaller op and the shift. - SDValue NewCst = CurDAG->getTargetConstant(Val >> ShlVal, dl, CstVT); + // Even though we shrink the constant, the VT should match the operation VT. + SDValue NewCst = CurDAG->getTargetConstant(Val >> ShlVal, dl, NVT); SDNode *New = CurDAG->getMachineNode(Op, dl, NVT, N0->getOperand(0),NewCst); if (ShlVal == 1) CurDAG->SelectNodeTo(Node, AddOp, NVT, SDValue(New, 0), |
