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authorElena Demikhovsky <elena.demikhovsky@intel.com>2014-02-05 13:03:01 +0000
committerElena Demikhovsky <elena.demikhovsky@intel.com>2014-02-05 13:03:01 +0000
commita38114c45eff220669ac0ec3ce6dba2d55e6c256 (patch)
tree40ea72ec3156607d540fbafbe653cda7152e8141 /llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
parenta54308fc6d77d406523da9e053a3fdf24f1ca6de (diff)
downloadbcm5719-llvm-a38114c45eff220669ac0ec3ce6dba2d55e6c256.tar.gz
bcm5719-llvm-a38114c45eff220669ac0ec3ce6dba2d55e6c256.zip
AVX-512: fixed a bug in EVEX encoding (the bug appeared after r200624)
llvm-svn: 200837
Diffstat (limited to 'llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp')
-rw-r--r--llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 3d4bbafee66..a76eecaaee6 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -184,7 +184,7 @@ static bool isDisp8(int Value) {
/// isCDisp8 - Return true if this signed displacement fits in a 8-bit
/// compressed dispacement field.
static bool isCDisp8(uint64_t TSFlags, int Value, int& CValue) {
- assert(((TSFlags >> X86II::VEXShift) & X86II::EVEX) &&
+ assert((TSFlags & X86II::EncodingMask) >> X86II::EncodingShift == X86II::EVEX &&
"Compressed 8-bit displacement is only valid for EVEX inst.");
unsigned CD8E = (TSFlags >> X86II::EVEX_CD8EShift) & X86II::EVEX_CD8EMask;
@@ -386,7 +386,9 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
const MCOperand &Scale = MI.getOperand(Op+X86::AddrScaleAmt);
const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
unsigned BaseReg = Base.getReg();
- bool HasEVEX = (TSFlags >> X86II::VEXShift) & X86II::EVEX;
+ unsigned char Encoding = (TSFlags & X86II::EncodingMask) >>
+ X86II::EncodingShift;
+ bool HasEVEX = (Encoding == X86II::EVEX);
// Handle %rip relative addressing.
if (BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode
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