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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2017-06-30 20:43:40 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2017-06-30 20:43:40 +0000
commit03ab2e2b1c85ed25c386b5d4eef707949507b91a (patch)
treef14abf6bab159acb7b7eacbc5d459ce61551e640 /llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
parentff5e7e12956705c8f523848485042835fac58eea (diff)
downloadbcm5719-llvm-03ab2e2b1c85ed25c386b5d4eef707949507b91a.tar.gz
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[SystemZ] Add all remaining instructions
This adds all remaining instructions that were still missing, mostly privileged and semi-privileged system-level instructions. These are provided for use with the assembler and disassembler only. This brings the LLVM assembler / disassembler to parity with the GNU binutils tools. llvm-svn: 306876
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZSubtarget.cpp')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZSubtarget.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp b/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
index 0ab0c2f2591..eb4a0962f7e 100644
--- a/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
@@ -37,12 +37,13 @@ SystemZSubtarget::SystemZSubtarget(const Triple &TT, const std::string &CPU,
const TargetMachine &TM)
: SystemZGenSubtargetInfo(TT, CPU, FS), HasDistinctOps(false),
HasLoadStoreOnCond(false), HasHighWord(false), HasFPExtension(false),
- HasPopulationCount(false), HasMessageSecurityAssist4(false),
+ HasPopulationCount(false), HasMessageSecurityAssist3(false),
+ HasMessageSecurityAssist4(false), HasResetReferenceBitsMultiple(false),
HasFastSerialization(false), HasInterlockedAccess1(false),
HasMiscellaneousExtensions(false),
HasExecutionHint(false), HasLoadAndTrap(false),
HasTransactionalExecution(false), HasProcessorAssist(false),
- HasDFPZonedConversion(false),
+ HasDFPZonedConversion(false), HasEnhancedDAT2(false),
HasVector(false), HasLoadStoreOnCond2(false),
HasLoadAndZeroRightmostByte(false), HasMessageSecurityAssist5(false),
HasDFPPackedConversion(false),
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