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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2017-06-30 20:43:40 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2017-06-30 20:43:40 +0000
commit03ab2e2b1c85ed25c386b5d4eef707949507b91a (patch)
treef14abf6bab159acb7b7eacbc5d459ce61551e640 /llvm/lib/Target/SystemZ/Disassembler
parentff5e7e12956705c8f523848485042835fac58eea (diff)
downloadbcm5719-llvm-03ab2e2b1c85ed25c386b5d4eef707949507b91a.tar.gz
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[SystemZ] Add all remaining instructions
This adds all remaining instructions that were still missing, mostly privileged and semi-privileged system-level instructions. These are provided for use with the assembler and disassembler only. This brings the LLVM assembler / disassembler to parity with the GNU binutils tools. llvm-svn: 306876
Diffstat (limited to 'llvm/lib/Target/SystemZ/Disassembler')
-rw-r--r--llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp b/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
index 27fd70bc609..8903b57ffd0 100644
--- a/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
+++ b/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
@@ -162,6 +162,12 @@ static DecodeStatus DecodeAR32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
return decodeRegisterClass(Inst, RegNo, SystemZMC::AR32Regs, 16);
}
+static DecodeStatus DecodeCR64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
+ uint64_t Address,
+ const void *Decoder) {
+ return decodeRegisterClass(Inst, RegNo, SystemZMC::CR64Regs, 16);
+}
+
template<unsigned N>
static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm) {
if (!isUInt<N>(Imm))
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