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| author | Luis Marques <luismarques@lowrisc.org> | 2019-08-21 14:00:58 +0000 |
|---|---|---|
| committer | Luis Marques <luismarques@lowrisc.org> | 2019-08-21 14:00:58 +0000 |
| commit | c3bf3d14ea66767e688242c93cb9920ad80b64a3 (patch) | |
| tree | 030c8dd7701c75dea90f9c91100f44ab22c88ca5 /llvm/lib/Target/RISCV/RISCVSubtarget.h | |
| parent | a451156bb6ceb3700f6ea42e47e9a95d67723318 (diff) | |
| download | bcm5719-llvm-c3bf3d14ea66767e688242c93cb9920ad80b64a3.tar.gz bcm5719-llvm-c3bf3d14ea66767e688242c93cb9920ad80b64a3.zip | |
[RISCV] Add support for RVC HINT instructions
The hint instructions are enabled by default (if the standard C extension is
enabled). To disable them pass -mattr=-rvc-hints.
Differential Revision: https://reviews.llvm.org/D62592
llvm-svn: 369528
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVSubtarget.h')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVSubtarget.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h index 12ba5f844b0..fa19252f1f1 100644 --- a/llvm/lib/Target/RISCV/RISCVSubtarget.h +++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h @@ -42,6 +42,7 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo { bool HasRV64 = false; bool IsRV32E = false; bool EnableLinkerRelax = false; + bool EnableRVCHintInstrs = false; unsigned XLen = 32; MVT XLenVT = MVT::i32; RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown; @@ -87,6 +88,7 @@ public: bool is64Bit() const { return HasRV64; } bool isRV32E() const { return IsRV32E; } bool enableLinkerRelax() const { return EnableLinkerRelax; } + bool enableRVCHintInstrs() const { return EnableRVCHintInstrs; } MVT getXLenVT() const { return XLenVT; } unsigned getXLen() const { return XLen; } RISCVABI::ABI getTargetABI() const { return TargetABI; } |
