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authorAlex Bradbury <asb@lowrisc.org>2018-01-10 20:47:00 +0000
committerAlex Bradbury <asb@lowrisc.org>2018-01-10 20:47:00 +0000
commite027c93ac2ff56f86a5313e0678849adc3fd9a53 (patch)
treef9dccaea65881fb211b6663bdf6b1a2bb24b36b7 /llvm/lib/Target/RISCV/RISCVInstrInfo.h
parentf113deaa3cf3d7d5ef2a06e96c372aeb9b748187 (diff)
downloadbcm5719-llvm-e027c93ac2ff56f86a5313e0678849adc3fd9a53.tar.gz
bcm5719-llvm-e027c93ac2ff56f86a5313e0678849adc3fd9a53.zip
[RISCV] Implement branch analysis
This is a prerequisite for the branch relaxation pass, and allows a number of optimisation passes (e.g. BranchFolding and MachineBlockPlacement) to work. Differential Revision: https://reviews.llvm.org/D40808 llvm-svn: 322222
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVInstrInfo.h')
-rw-r--r--llvm/lib/Target/RISCV/RISCVInstrInfo.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.h b/llvm/lib/Target/RISCV/RISCVInstrInfo.h
index cb2ed0beef1..772bc2cae80 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.h
@@ -46,6 +46,22 @@ public:
void movImm32(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
const DebugLoc &DL, unsigned DstReg, uint64_t Val,
MachineInstr::MIFlag Flag = MachineInstr::NoFlags) const;
+
+ bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
+ MachineBasicBlock *&FBB,
+ SmallVectorImpl<MachineOperand> &Cond,
+ bool AllowModify) const override;
+
+ unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
+ MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
+ const DebugLoc &dl,
+ int *BytesAdded = nullptr) const override;
+
+ unsigned removeBranch(MachineBasicBlock &MBB,
+ int *BytesRemoved = nullptr) const override;
+
+ bool
+ reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
};
}
#endif
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