diff options
| author | Ana Pazos <apazos@codeaurora.org> | 2019-01-24 02:41:40 +0000 |
|---|---|---|
| committer | Ana Pazos <apazos@codeaurora.org> | 2019-01-24 02:41:40 +0000 |
| commit | c54abc520c64052b15f736f0392c073c0fd345c2 (patch) | |
| tree | d9d9d5391cca5bff4a3ea8ad4341f9b7c917e13b /llvm/lib/Target/RISCV/RISCVInstrInfo.h | |
| parent | 3b4d731fdef8441f43cebc03f7555bac8c38f808 (diff) | |
| download | bcm5719-llvm-c54abc520c64052b15f736f0392c073c0fd345c2.tar.gz bcm5719-llvm-c54abc520c64052b15f736f0392c073c0fd345c2.zip | |
[RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI
Summary:
Affected instructions:
PseudoLI simplest form (ADDI with X0)
ALU operations with immediate (they do not set status flag - ADDI, ORI, XORI)
Reviewers: asb
Reviewed By: asb
Subscribers: shiva0217, rkruppe, kito-cheng, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei
Differential Revision: https://reviews.llvm.org/D56526
llvm-svn: 352010
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVInstrInfo.h')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVInstrInfo.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.h b/llvm/lib/Target/RISCV/RISCVInstrInfo.h index 28a7e2fb2b6..ff098e660d1 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.h +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.h @@ -78,6 +78,8 @@ public: bool isBranchOffsetInRange(unsigned BranchOpc, int64_t BrOffset) const override; + + bool isAsCheapAsAMove(const MachineInstr &MI) const override; }; } #endif |
