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| author | Alex Bradbury <asb@lowrisc.org> | 2018-10-03 23:30:16 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2018-10-03 23:30:16 +0000 |
| commit | 5ac0a2fc48bdfc1165ca66b157cc0c46ba04e6e2 (patch) | |
| tree | 466b296baa84f2264040df8fb060c958aa1f5c9d /llvm/lib/Target/RISCV/RISCVISelLowering.h | |
| parent | 150ca5309e7c321689527a60e6e7b8d636f20a79 (diff) | |
| download | bcm5719-llvm-5ac0a2fc48bdfc1165ca66b157cc0c46ba04e6e2.tar.gz bcm5719-llvm-5ac0a2fc48bdfc1165ca66b157cc0c46ba04e6e2.zip | |
[RISCV] Handle redundant SplitF64+BuildPairF64 pairs in a DAGCombine
r343712 performed this optimisation during instruction selection. As Eli
Friedman pointed out in post-commit review, implementing this as a DAGCombine
might allow opportunities for further optimisations.
llvm-svn: 343741
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVISelLowering.h')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVISelLowering.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h index e21951140b3..47dbc1af969 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.h +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h @@ -58,6 +58,8 @@ public: // Provide custom lowering hooks for some operations. SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; + SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; + // This method returns the name of a target specific DAG node. const char *getTargetNodeName(unsigned Opcode) const override; |
