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| author | Craig Topper <craig.topper@intel.com> | 2018-10-04 21:24:24 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-10-04 21:24:24 +0000 |
| commit | 7d2155e3f931005f19cd76e3442cc14666a626c2 (patch) | |
| tree | 8db66a0006607815bc0e7a2d1c5ee90f193daab6 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 1d15f7b02b8ac469d5d70b94aef924791297cb03 (diff) | |
| download | bcm5719-llvm-7d2155e3f931005f19cd76e3442cc14666a626c2.tar.gz bcm5719-llvm-7d2155e3f931005f19cd76e3442cc14666a626c2.zip | |
[X86][LegalizeVectorOps] Use MERGE_VALUES to return two results from LowerLoad. Remove special case code in LegalizeVectorOps that allowed us to only return one result.
Previously we replaced the chain use ourself and return the data result. LegalizeVectorOps then detected that we'd done this and assumed the chain had already been handled.
This commit instead returns a MERGE_VALUES node with two results joined from nodes. This allows LegalizeVectorOps to do all the replacements for us without any special casing. The MERGE_VALUES will be removed by DAG combine.
llvm-svn: 343817
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions
