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| author | Alex Bradbury <asb@lowrisc.org> | 2017-12-13 09:41:21 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2017-12-13 09:41:21 +0000 |
| commit | 581d6b081debcd8496de2c796d1e25014b9dc13a (patch) | |
| tree | f837461f5d38e998a74b6dcafb7ee0f48e3dc7d9 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 60714f98baed163ef013512baa5ef368cdf04bbe (diff) | |
| download | bcm5719-llvm-581d6b081debcd8496de2c796d1e25014b9dc13a.tar.gz bcm5719-llvm-581d6b081debcd8496de2c796d1e25014b9dc13a.zip | |
[RISCV][NFC] Put isSImm6 and simm6 td definition in correct sorted position
We sort these helper functions and td definitions by bit width. simm6 was
previously out-of-order with respect to the others.
llvm-svn: 320559
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions
