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| author | Luis Marques <luismarques@lowrisc.org> | 2019-08-21 21:11:37 +0000 |
|---|---|---|
| committer | Luis Marques <luismarques@lowrisc.org> | 2019-08-21 21:11:37 +0000 |
| commit | 4f488b594ae11a39260f1b347be4a79c72bd3f35 (patch) | |
| tree | e27061b8165acf35437c79c6e7bdfc88100a2951 /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | 359840a6e4ae062f984c2ce91ab37c084755c158 (diff) | |
| download | bcm5719-llvm-4f488b594ae11a39260f1b347be4a79c72bd3f35.tar.gz bcm5719-llvm-4f488b594ae11a39260f1b347be4a79c72bd3f35.zip | |
[RISCV] Fix use of side-effects in asserts in decoder functions
llvm-svn: 369580
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index cdc95daa806..605a0d76d09 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -303,8 +303,9 @@ static DecodeStatus decodeRVCInstrSImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) { uint64_t SImm6 = fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); - assert(decodeSImmOperand<6>(Inst, SImm6, Address, Decoder) == - MCDisassembler::Success && "Invalid immediate"); + DecodeStatus Result = decodeSImmOperand<6>(Inst, SImm6, Address, Decoder); + (void)Result; + assert(Result == MCDisassembler::Success && "Invalid immediate"); (void)SImm6; return MCDisassembler::Success; } @@ -315,8 +316,9 @@ static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, unsigned Insn, DecodeGPRRegisterClass(Inst, 0, Address, Decoder); uint64_t SImm6 = fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); - assert(decodeSImmOperand<6>(Inst, SImm6, Address, Decoder) == - MCDisassembler::Success && "Invalid immediate"); + DecodeStatus Result = decodeSImmOperand<6>(Inst, SImm6, Address, Decoder); + (void)Result; + assert(Result == MCDisassembler::Success && "Invalid immediate"); (void)SImm6; return MCDisassembler::Success; } @@ -328,8 +330,9 @@ static DecodeStatus decodeRVCInstrRdRs1UImm(MCInst &Inst, unsigned Insn, Inst.addOperand(Inst.getOperand(0)); uint64_t UImm6 = fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); - assert(decodeUImmOperand<6>(Inst, UImm6, Address, Decoder) == - MCDisassembler::Success && "Invalid immediate"); + DecodeStatus Result = decodeUImmOperand<6>(Inst, UImm6, Address, Decoder); + (void)Result; + assert(Result == MCDisassembler::Success && "Invalid immediate"); (void)UImm6; return MCDisassembler::Success; } |
