diff options
| author | Sanjay Patel <spatel@rotateright.com> | 2018-10-04 21:36:50 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-10-04 21:36:50 +0000 |
| commit | 3436dc29239d4b78f8042f431afec9d322faebe6 (patch) | |
| tree | a5e0f4975cde1fd68d3c0129dd2d1f1d6503cbcf /llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp | |
| parent | e122f94fa045582c6e3d7ea78632df447e84d435 (diff) | |
| download | bcm5719-llvm-3436dc29239d4b78f8042f431afec9d322faebe6.tar.gz bcm5719-llvm-3436dc29239d4b78f8042f431afec9d322faebe6.zip | |
[InstCombine] drop poison flags in SimplifyVectorDemandedElts
We established the (unfortunately complicated) rules for UB/poison
propagation with vector ops in:
D48893
D48987
D49047
It's clear from the affected tests that we are potentially creating
poison where none existed before the transforms. For add/sub/mul,
the answer is simple: just drop the flags because the extra undef
vector lanes are generally more valuable for analysis and codegen.
llvm-svn: 343819
Diffstat (limited to 'llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions
