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author | Andrew Trick <atrick@apple.com> | 2013-09-20 05:14:41 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2013-09-20 05:14:41 +0000 |
commit | 978674b2bcb0c73cc33628f35857963924b0f4fc (patch) | |
tree | 926902639c0acd17b7313f3c8a13151e6fe3abb8 /llvm/lib/Target/R600 | |
parent | eb0434e9aebf1b98b74f96b4d0a0e33d252a8e3d (diff) | |
download | bcm5719-llvm-978674b2bcb0c73cc33628f35857963924b0f4fc.tar.gz bcm5719-llvm-978674b2bcb0c73cc33628f35857963924b0f4fc.zip |
Allow subtarget selection of the default MachineScheduler and document the interface.
The global registry is used to allow command line override of the
scheduler selection, but does not work well as the normal selection
API. For example, the same LLVM process should be able to target
multiple targets or subtargets.
llvm-svn: 191071
Diffstat (limited to 'llvm/lib/Target/R600')
-rw-r--r-- | llvm/lib/Target/R600/AMDGPUSubtarget.h | 4 | ||||
-rw-r--r-- | llvm/lib/Target/R600/AMDGPUTargetMachine.cpp | 18 |
2 files changed, 14 insertions, 8 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUSubtarget.h b/llvm/lib/Target/R600/AMDGPUSubtarget.h index 8c650965520..0e8b58aa3c5 100644 --- a/llvm/lib/Target/R600/AMDGPUSubtarget.h +++ b/llvm/lib/Target/R600/AMDGPUSubtarget.h @@ -64,6 +64,10 @@ public: bool hasHWFP64() const; bool hasCaymanISA() const; + virtual bool enableMachineScheduler() const { + return getGeneration() <= NORTHERN_ISLANDS; + } + // Helper functions to simplify if statements bool isTargetELF() const; std::string getDataLayout() const; diff --git a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp index d77cdddf8b5..2119ed363d9 100644 --- a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp @@ -80,17 +80,20 @@ namespace { class AMDGPUPassConfig : public TargetPassConfig { public: AMDGPUPassConfig(AMDGPUTargetMachine *TM, PassManagerBase &PM) - : TargetPassConfig(TM, PM) { - const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); - if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { - enablePass(&MachineSchedulerID); - MachineSchedRegistry::setDefault(createR600MachineScheduler); - } - } + : TargetPassConfig(TM, PM) {} AMDGPUTargetMachine &getAMDGPUTargetMachine() const { return getTM<AMDGPUTargetMachine>(); } + + virtual ScheduleDAGInstrs * + createMachineScheduler(MachineSchedContext *C) const { + const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); + if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) + return createR600MachineScheduler(C); + return 0; + } + virtual bool addPreISel(); virtual bool addInstSelector(); virtual bool addPreRegAlloc(); @@ -186,4 +189,3 @@ bool AMDGPUPassConfig::addPreEmitPass() { return false; } - |