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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-10-10 17:11:19 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-10-10 17:11:19 +0000 |
| commit | 1b99ed82907187496652e1299321a27c4b73226a (patch) | |
| tree | e6deedd8c73c2e42f4c815a238898e32b689fa90 /llvm/lib/Target/R600 | |
| parent | ed0ceec1c17f30445df8e9cbadd304c74b3efd40 (diff) | |
| download | bcm5719-llvm-1b99ed82907187496652e1299321a27c4b73226a.tar.gz bcm5719-llvm-1b99ed82907187496652e1299321a27c4b73226a.zip | |
R600/SI: Mark the EXEC register as reserved
This prevents the machine verifier from complaining about uses of
an undefined physical register.
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 192364
Diffstat (limited to 'llvm/lib/Target/R600')
| -rw-r--r-- | llvm/lib/Target/R600/SIRegisterInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/SIRegisterInfo.cpp b/llvm/lib/Target/R600/SIRegisterInfo.cpp index 5d12564fe8b..7f69ef6f286 100644 --- a/llvm/lib/Target/R600/SIRegisterInfo.cpp +++ b/llvm/lib/Target/R600/SIRegisterInfo.cpp @@ -25,6 +25,7 @@ SIRegisterInfo::SIRegisterInfo(AMDGPUTargetMachine &tm) BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); + Reserved.set(AMDGPU::EXEC); return Reserved; } |
