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authorMatt Arsenault <Matthew.Arsenault@amd.com>2014-11-14 02:21:58 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2014-11-14 02:21:58 +0000
commit21c938e14b663031130649b432ffda919559ac23 (patch)
tree5102d3991d8c8c950ef1f1909f910167c638aec8 /llvm/lib/Target/R600/SIRegisterInfo.cpp
parentbc2d6329646af94e08764a75128431f07a138a6e (diff)
downloadbcm5719-llvm-21c938e14b663031130649b432ffda919559ac23.tar.gz
bcm5719-llvm-21c938e14b663031130649b432ffda919559ac23.zip
R600/SI: Make constant array static
llvm-svn: 221965
Diffstat (limited to 'llvm/lib/Target/R600/SIRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/R600/SIRegisterInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/SIRegisterInfo.cpp b/llvm/lib/Target/R600/SIRegisterInfo.cpp
index 3715e6a6cf8..0131e37f514 100644
--- a/llvm/lib/Target/R600/SIRegisterInfo.cpp
+++ b/llvm/lib/Target/R600/SIRegisterInfo.cpp
@@ -267,7 +267,7 @@ unsigned SIRegisterInfo::getHWRegIndex(unsigned Reg) const {
const TargetRegisterClass *SIRegisterInfo::getPhysRegClass(unsigned Reg) const {
assert(!TargetRegisterInfo::isVirtualRegister(Reg));
- const TargetRegisterClass *BaseClasses[] = {
+ static const TargetRegisterClass *BaseClasses[] = {
&AMDGPU::VReg_32RegClass,
&AMDGPU::SReg_32RegClass,
&AMDGPU::VReg_64RegClass,
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