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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-08-01 00:32:33 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-08-01 00:32:33 +0000 |
| commit | 6407e1e63283e56191e52353650b95c505c41365 (patch) | |
| tree | 913f9aa333e1aa8970164930e3d99ef049e6cc0e /llvm/lib/Target/R600/SIInstrInfo.cpp | |
| parent | 86d12ebdbd33c0d04f4ecd74003a51abb55d488f (diff) | |
| download | bcm5719-llvm-6407e1e63283e56191e52353650b95c505c41365.tar.gz bcm5719-llvm-6407e1e63283e56191e52353650b95c505c41365.zip | |
R600/SI: Fold immediates when shrinking instructions
This will prevent us from using extra MOV instructions once we prefer
selecting 64-bit instructions.
llvm-svn: 214464
Diffstat (limited to 'llvm/lib/Target/R600/SIInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.cpp b/llvm/lib/Target/R600/SIInstrInfo.cpp index fc395ee4919..c6be2e46999 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.cpp +++ b/llvm/lib/Target/R600/SIInstrInfo.cpp @@ -1736,7 +1736,7 @@ void SIInstrInfo::reserveIndirectRegisters(BitVector &Reserved, Reserved.set(AMDGPU::VReg_512RegClass.getRegister(Index)); } -const MachineOperand *SIInstrInfo::getNamedOperand(const MachineInstr& MI, +MachineOperand *SIInstrInfo::getNamedOperand(MachineInstr &MI, unsigned OperandName) const { int Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), OperandName); if (Idx == -1) |
