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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-11-18 20:39:39 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-11-18 20:39:39 +0000 |
| commit | f0a2107c6ba1c1838cee83bac234c7e18fc3455c (patch) | |
| tree | 3b592ce3f754198660b25153b6fbe1851f7db9b1 /llvm/lib/Target/R600/SIISelLowering.cpp | |
| parent | 5cb5051b46cb75cd4581ed98c8b14f5e8a863e4c (diff) | |
| download | bcm5719-llvm-f0a2107c6ba1c1838cee83bac234c7e18fc3455c.tar.gz bcm5719-llvm-f0a2107c6ba1c1838cee83bac234c7e18fc3455c.zip | |
R600/SI: Make sure resource descriptors are always stored in SGPRs
llvm-svn: 222253
Diffstat (limited to 'llvm/lib/Target/R600/SIISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index 7c557af1d51..8d4164a1c39 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -53,10 +53,10 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) : addRegisterClass(MVT::v4i32, &AMDGPU::SReg_128RegClass); addRegisterClass(MVT::v4f32, &AMDGPU::VReg_128RegClass); - addRegisterClass(MVT::v8i32, &AMDGPU::VReg_256RegClass); + addRegisterClass(MVT::v8i32, &AMDGPU::SReg_256RegClass); addRegisterClass(MVT::v8f32, &AMDGPU::VReg_256RegClass); - addRegisterClass(MVT::v16i32, &AMDGPU::VReg_512RegClass); + addRegisterClass(MVT::v16i32, &AMDGPU::SReg_512RegClass); addRegisterClass(MVT::v16f32, &AMDGPU::VReg_512RegClass); computeRegisterProperties(); |
