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author | Rafael Espindola <rafael.espindola@gmail.com> | 2014-10-14 18:58:04 +0000 |
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committer | Rafael Espindola <rafael.espindola@gmail.com> | 2014-10-14 18:58:04 +0000 |
commit | db3f0a24ec7b97185dda68558effbd01c4f1e621 (patch) | |
tree | 2cdb2005cb48854838de00da0b3ce68cc741ee3a /llvm/lib/Target/R600/SIISelLowering.cpp | |
parent | 76936ebc492126a6e3e8fef65bdae5cf95243703 (diff) | |
download | bcm5719-llvm-db3f0a24ec7b97185dda68558effbd01c4f1e621.tar.gz bcm5719-llvm-db3f0a24ec7b97185dda68558effbd01c4f1e621.zip |
Revert "R600: Add new intrinsic to read work dimensions"
This reverts commit r219705.
CodeGen/R600/work-item-intrinsics.ll was failing on linux.
llvm-svn: 219707
Diffstat (limited to 'llvm/lib/Target/R600/SIISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 11 |
1 files changed, 2 insertions, 9 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index 28881955156..49ac269998e 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -519,11 +519,11 @@ SDValue SITargetLowering::LowerFormalArguments( if (VA.isMemLoc()) { VT = Ins[i].VT; EVT MemVT = Splits[i].VT; - const unsigned Offset = 36 + VA.getLocMemOffset(); // The first 36 bytes of the input buffer contains information about // thread group and global sizes. SDValue Arg = LowerParameter(DAG, VT, MemVT, DL, DAG.getRoot(), - Offset, Ins[i].Flags.isSExt()); + 36 + VA.getLocMemOffset(), + Ins[i].Flags.isSExt()); const PointerType *ParamTy = dyn_cast<PointerType>(FType->getParamType(Ins[i].OrigArgIndex)); @@ -537,7 +537,6 @@ SDValue SITargetLowering::LowerFormalArguments( } InVals.push_back(Arg); - Info->ABIArgOffset = Offset + MemVT.getStoreSize(); continue; } assert(VA.isRegLoc() && "Parameter must be in a register!"); @@ -928,12 +927,6 @@ SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::r600_read_local_size_z: return LowerParameter(DAG, VT, VT, DL, DAG.getEntryNode(), SI::KernelInputOffsets::LOCAL_SIZE_Z, false); - - case Intrinsic::AMDGPU_read_workdim: - return LowerParameter(DAG, VT, VT, DL, DAG.getEntryNode(), - MF.getInfo<SIMachineFunctionInfo>()->ABIArgOffset, - false); - case Intrinsic::r600_read_tgid_x: return CreateLiveInRegister(DAG, &AMDGPU::SReg_32RegClass, TRI->getPreloadedValue(MF, SIRegisterInfo::TGID_X), VT); |