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authorTom Stellard <thomas.stellard@amd.com>2014-08-01 00:32:39 +0000
committerTom Stellard <thomas.stellard@amd.com>2014-08-01 00:32:39 +0000
commitb4a313a76f8cff741388ae652bb64c4fbe489051 (patch)
treed5cbfe3beac3d16942c2b81d3a3aa56451b37fe4 /llvm/lib/Target/R600/SIISelLowering.cpp
parent6655dd699f6e473aef52779ca922a2f43b5f6022 (diff)
downloadbcm5719-llvm-b4a313a76f8cff741388ae652bb64c4fbe489051.tar.gz
bcm5719-llvm-b4a313a76f8cff741388ae652bb64c4fbe489051.zip
R600/SI: Do abs/neg folding with ComplexPatterns
Abs/neg folding has moved out of foldOperands and into the instruction selection phase using complex patterns. As a consequence of this change, we now prefer to select the 64-bit encoding for most instructions and the modifier operands have been dropped from integer VOP3 instructions. llvm-svn: 214467
Diffstat (limited to 'llvm/lib/Target/R600/SIISelLowering.cpp')
-rw-r--r--llvm/lib/Target/R600/SIISelLowering.cpp32
1 files changed, 7 insertions, 25 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp
index c3405e10453..dc26a82e19d 100644
--- a/llvm/lib/Target/R600/SIISelLowering.cpp
+++ b/llvm/lib/Target/R600/SIISelLowering.cpp
@@ -566,8 +566,6 @@ MachineBasicBlock * SITargetLowering::EmitInstrWithCustomInserter(
.addReg(MI->getOperand(1).getReg())
.addImm(1) // SRC1 modifiers
.addReg(MI->getOperand(2).getReg())
- .addImm(0) // SRC2 modifiers
- .addImm(0) // src2
.addImm(0) // CLAMP
.addImm(0); // OMOD
MI->eraseFromParent();
@@ -1636,39 +1634,23 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node,
continue;
if (!Operand.isMachineOpcode())
continue;
- if (Operand.getMachineOpcode() == AMDGPU::FNEG_SI) {
- Ops.pop_back();
- Ops.push_back(Operand.getOperand(0));
- InputModifiers[i] = 1;
- Promote2e64 = true;
- if (!DescE64)
- continue;
- Desc = DescE64;
- DescE64 = nullptr;
- }
- else if (Operand.getMachineOpcode() == AMDGPU::FABS_SI) {
- Ops.pop_back();
- Ops.push_back(Operand.getOperand(0));
- InputModifiers[i] = 2;
- Promote2e64 = true;
- if (!DescE64)
- continue;
- Desc = DescE64;
- DescE64 = nullptr;
- }
}
if (Promote2e64) {
std::vector<SDValue> OldOps(Ops);
Ops.clear();
+ bool HasModifiers = TII->hasModifiers(Desc->Opcode);
for (unsigned i = 0; i < OldOps.size(); ++i) {
// src_modifier
- Ops.push_back(DAG.getTargetConstant(InputModifiers[i], MVT::i32));
+ if (HasModifiers)
+ Ops.push_back(DAG.getTargetConstant(InputModifiers[i], MVT::i32));
Ops.push_back(OldOps[i]);
}
// Add the modifier flags while promoting
- for (unsigned i = 0; i < 2; ++i)
- Ops.push_back(DAG.getTargetConstant(0, MVT::i32));
+ if (HasModifiers) {
+ for (unsigned i = 0; i < 2; ++i)
+ Ops.push_back(DAG.getTargetConstant(0, MVT::i32));
+ }
}
// Add optional chain and glue
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