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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-09-08 15:07:33 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-09-08 15:07:33 +0000 |
| commit | 69bfb904194d78c492809e5d5df2cb3b3ee01951 (patch) | |
| tree | bb804f89dee2a868590816af0e3d205688222132 /llvm/lib/Target/R600/SIISelLowering.cpp | |
| parent | 7ac9c4a0745b33879001ed0ac0ab7a57be540f6d (diff) | |
| download | bcm5719-llvm-69bfb904194d78c492809e5d5df2cb3b3ee01951.tar.gz bcm5719-llvm-69bfb904194d78c492809e5d5df2cb3b3ee01951.zip | |
R600/SI: Fix assertion from copying a TargetGlobalAddress
Assert in scheduler from an inserted copy_to_regclass from
a constant.
This only seems to break sometimes when a constant initializer
address is forced into VGPRs in a non-entry block. No test
since the only case I've managed to hit only happens with a future
patch, and that case will also not be a problem once scalar instructions
are used in non-entry blocks.
llvm-svn: 217380
Diffstat (limited to 'llvm/lib/Target/R600/SIISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index b5054d17049..629a42cdfbd 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -1641,7 +1641,8 @@ void SITargetLowering::ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand, SDNode *Node; // We can't use COPY_TO_REGCLASS with FrameIndex arguments. - if (isa<FrameIndexSDNode>(Operand)) { + if (isa<FrameIndexSDNode>(Operand) || + isa<GlobalAddressSDNode>(Operand)) { unsigned Opcode = Operand.getValueType() == MVT::i32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; Node = DAG.getMachineNode(Opcode, SDLoc(), Operand.getValueType(), |
