diff options
| author | Eric Christopher <echristo@gmail.com> | 2015-02-26 00:00:24 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@gmail.com> | 2015-02-26 00:00:24 +0000 |
| commit | 23a3a7c87139324f3c786a038f698e372e98b514 (patch) | |
| tree | 62b2ce2eba85c858383fb26c3c737ba2382a7f8a /llvm/lib/Target/R600/SIISelLowering.cpp | |
| parent | f8ea847e482690e35baaad8d7fb8a582fe199db3 (diff) | |
| download | bcm5719-llvm-23a3a7c87139324f3c786a038f698e372e98b514.tar.gz bcm5719-llvm-23a3a7c87139324f3c786a038f698e372e98b514.zip | |
Remove an argument-less call to getSubtargetImpl from TargetLoweringBase.
This required plumbing a TargetRegisterInfo through computeRegisterProperties
and into findRepresentativeClass which uses it for register class
iteration. This required passing a subtarget into a few target specific
initializations of TargetLowering.
llvm-svn: 230583
Diffstat (limited to 'llvm/lib/Target/R600/SIISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index 79a7f903b3a..7d794b8afc3 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -60,7 +60,7 @@ SITargetLowering::SITargetLowering(TargetMachine &TM, addRegisterClass(MVT::v16i32, &AMDGPU::SReg_512RegClass); addRegisterClass(MVT::v16f32, &AMDGPU::VReg_512RegClass); - computeRegisterProperties(); + computeRegisterProperties(STI.getRegisterInfo()); setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i32, Expand); setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8f32, Expand); |
