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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-04-07 19:45:45 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-04-07 19:45:45 +0000 |
| commit | 204e61bbdf51e875c49ef203d35b3a8fc016029c (patch) | |
| tree | b851af54260e3ce58ee58c62c94f36d055cb1614 /llvm/lib/Target/R600/SIFixSGPRCopies.cpp | |
| parent | 50122a58906e36184fd2a0f95944fbca6c6b08f0 (diff) | |
| download | bcm5719-llvm-204e61bbdf51e875c49ef203d35b3a8fc016029c.tar.gz bcm5719-llvm-204e61bbdf51e875c49ef203d35b3a8fc016029c.zip | |
R600/SI: Handle INSERT_SUBREG in SIFixSGPRCopies
llvm-svn: 205732
Diffstat (limited to 'llvm/lib/Target/R600/SIFixSGPRCopies.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/SIFixSGPRCopies.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/SIFixSGPRCopies.cpp b/llvm/lib/Target/R600/SIFixSGPRCopies.cpp index 402f1f4d651..29d154ff425 100644 --- a/llvm/lib/Target/R600/SIFixSGPRCopies.cpp +++ b/llvm/lib/Target/R600/SIFixSGPRCopies.cpp @@ -256,6 +256,16 @@ bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) { TII->moveToVALU(MI); break; } + case AMDGPU::INSERT_SUBREG: { + const TargetRegisterClass *DstRC, *SrcRC; + DstRC = MRI.getRegClass(MI.getOperand(0).getReg()); + SrcRC = MRI.getRegClass(MI.getOperand(1).getReg()); + if (!TRI->isSGPRClass(DstRC) || !TRI->hasVGPRs(SrcRC)) + break; + DEBUG(dbgs() << " Fixing INSERT_SUBREG:\n"); + DEBUG(MI.print(dbgs())); + TII->moveToVALU(MI); + } } } } |
