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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-11-18 18:50:15 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-11-18 18:50:15 +0000 |
| commit | 13de5456938e6245c9f69aa2f0d0833f9b463c47 (patch) | |
| tree | 10f8097ab1e65dba867f115bf13ab8d564e9374b /llvm/lib/Target/R600/SIFixSGPRCopies.cpp | |
| parent | ef1cf830e089df74d25aebe623704909709668d9 (diff) | |
| download | bcm5719-llvm-13de5456938e6245c9f69aa2f0d0833f9b463c47.tar.gz bcm5719-llvm-13de5456938e6245c9f69aa2f0d0833f9b463c47.zip | |
R600/SI: Fix another case of illegal VGPR->SGPR copy
llvm-svn: 195025
Diffstat (limited to 'llvm/lib/Target/R600/SIFixSGPRCopies.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/SIFixSGPRCopies.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/Target/R600/SIFixSGPRCopies.cpp b/llvm/lib/Target/R600/SIFixSGPRCopies.cpp index 6116b4e3c53..b49fda9689c 100644 --- a/llvm/lib/Target/R600/SIFixSGPRCopies.cpp +++ b/llvm/lib/Target/R600/SIFixSGPRCopies.cpp @@ -181,14 +181,13 @@ bool SIFixSGPRCopies::isVGPRToSGPRCopy(const MachineInstr &Copy, unsigned SrcReg = Copy.getOperand(1).getReg(); unsigned SrcSubReg = Copy.getOperand(1).getSubReg(); const TargetRegisterClass *DstRC = MRI.getRegClass(DstReg); + const TargetRegisterClass *SrcRC; if (!TargetRegisterInfo::isVirtualRegister(SrcReg) || DstRC == &AMDGPU::M0RegRegClass) return false; - const TargetRegisterClass *SrcRC = TRI->getSubRegClass( - MRI.getRegClass(SrcReg), SrcSubReg); - + SrcRC = inferRegClassFromDef(TRI, MRI, SrcReg, SrcSubReg); return TRI->isSGPRClass(DstRC) && !TRI->getCommonSubClass(DstRC, SrcRC); } |
