From 13de5456938e6245c9f69aa2f0d0833f9b463c47 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Mon, 18 Nov 2013 18:50:15 +0000 Subject: R600/SI: Fix another case of illegal VGPR->SGPR copy llvm-svn: 195025 --- llvm/lib/Target/R600/SIFixSGPRCopies.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'llvm/lib/Target/R600/SIFixSGPRCopies.cpp') diff --git a/llvm/lib/Target/R600/SIFixSGPRCopies.cpp b/llvm/lib/Target/R600/SIFixSGPRCopies.cpp index 6116b4e3c53..b49fda9689c 100644 --- a/llvm/lib/Target/R600/SIFixSGPRCopies.cpp +++ b/llvm/lib/Target/R600/SIFixSGPRCopies.cpp @@ -181,14 +181,13 @@ bool SIFixSGPRCopies::isVGPRToSGPRCopy(const MachineInstr &Copy, unsigned SrcReg = Copy.getOperand(1).getReg(); unsigned SrcSubReg = Copy.getOperand(1).getSubReg(); const TargetRegisterClass *DstRC = MRI.getRegClass(DstReg); + const TargetRegisterClass *SrcRC; if (!TargetRegisterInfo::isVirtualRegister(SrcReg) || DstRC == &AMDGPU::M0RegRegClass) return false; - const TargetRegisterClass *SrcRC = TRI->getSubRegClass( - MRI.getRegClass(SrcReg), SrcSubReg); - + SrcRC = inferRegClassFromDef(TRI, MRI, SrcReg, SrcSubReg); return TRI->isSGPRClass(DstRC) && !TRI->getCommonSubClass(DstRC, SrcRC); } -- cgit v1.2.3